The pseudo-noise (or pseudo random) sequence is a noise like high frequency signal. This signal is binary in nature. Thus it looks like pulses. The sequence is not completely random but it is generated by a well defined logic. The same logic is used at transmitter and receiver. Since the sequence is generated by a well defined logic, it is rather ‘pseudo’ random. Hence it is called pseudo-random (or pseudo-noise) sequence. The pseudo-noise sequence can be generated by a feedback shift register and the combinational logic. The generalized block diagram of this scheme is shown in Fig. The shift register consists of **‘m’** flip-flops. The data of one flip-flop is given to the next flip-flop whenever clock pulse is applied. The output of the flip-flop are given to the logic circuit. Depending upon the outputs of the flip-flops, the output of the logic circuit is decided. This logic circuit output is given as an input to the first flip-flop of shift register. The pseudo-noise sequence is generated at the output of last flip-flop in the shift register. At each pulse of the clock, the state of the flip-flop is shifted to the next flip-flop and logic circuit output is shifted in the first flip-flop.

The pseudo-noise sequence generated at the output of the flip-flop repeated after **2 ^{m}** digits. This is because the shift register will have

**2**states. Those states start repeating after

^{m}**2**, hence output sequence will also repeat after

^{m}**2**bits.

^{m}**2**is also called period of the sequence output sequence.

^{m}Normally the logic circuit is mod-2 adders. If shift register enters in zero state, it will not come out of it and output sequence will be of zeros only. To prevent this problem, the zero state of the shift register is not allowed. Therefore total number of states of **m**-state feed back register will be **2 ^{m}-1**. Therefore the output pseudo-noise sequence will also have a period of

**2**bits.

^{m}-1#### Maximum Length Sequences

When the pseudo-noise sequence generated by linear feed back shift register has the length of **2 ^{m}-1**, it is called maximum length sequence.

#### Properties of Maximum Length Sequences

**Balance property :**The number of 1’s is always one more than the number of zeros in each period of a maximum length sequence. Whereas in truly random binary sequence 1’s and 0’s are equally probable.**Run property :**The run means subsequence of identical symbols i.e. 1’s or 0’s within one period of the sequence. The length of the run is equal to length of the subsequence. When the maximum length sequence is generated by feedback shift registor of length**m**, then the total number of runs is**2**. In each period of maximum length sequence, there are one half runs of 1’s and 0’s have length one. There can be one fourth runs of 1’s and 0’s of length two; or there can be one eighth runs of length three and so on.^{m}-1**Correlation property :**The autocorrelation function of maximum length sequence is periodic and it is binary valued.

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